Electromigration Effect in VLSI

Electromigration is an important issue especially in lower technology node where the cross-sectional area of metal interconnects is very less. In this article, we will discuss the phenomenon of electromigration, the effects of electromigration and the ways to prevent the electromigration issue.    Electromigration: When a high current density passes through a metal interconnect, the … Read more

Crosstalk Timing Window Analysis and Prevention Techniques

In the previous two articles, we have discussed signal integrity, crosstalk, crosstalk mechanisms, the parasitic capacitances associated to interconnects, crosstalk noise, crosstalk delay and its effects. In this article, we will discuss the timing window analysis of crosstalk and the prevention techniques of crosstalk. Timing Window Analysis Crosstalk timing window analysis is based on the … Read more

Crosstalk Noise and Crosstalk Delay – Effects of Crosstalk

In the previous article, we have discussed signal integrity, crosstalk, crosstalk mechanisms and the parasitic capacitances associated with interconnects. In this article, we will discuss the effects of crosstalk. Crosstalk has two major effects: Crosstalk glitch or crosstalk noise Crosstalk delta delay or crosstalk delay Crosstalk glitch In order to explain the crosstalk glitch, we … Read more

Signal Integrity and Crosstalk effect in VLSI

“According to a research conducted by Collett International Research Inc., one in five chips fails because of the signal integrity.” In this article, we will discuss a very important issue of VLSI design called signal integrity and crosstalk which are responsible for the failure of many ASICs now a day. We will discuss signal integrity … Read more

Latch-up Prevention in CMOS Logics

Before discussing the prevention techniques of Latch-up issue, let’s recall the key factor of the latch-up issue first. The following two factors are important for the latch-up issue. High resistance of n-well and p-substrate β1 x β2 >  1                                                    Figure-1: Latch-up formation Figure-1 … Read more