Sometimes we need to place a particular group of standard cells or modules in a particular area (box). PnR tools allow us to do that. If I talk particularly about Cadence Innovus APR tool, It has three types of regions called Guide, Fence and Region through which we can provide guidance to the placement tool. … Read more
In the previous article, Best 5 books have recommended for Physical Design Engineer. While writing that article it was very difficult to make many books out of the list. So I thought it will be better to write another article on the best 25 books for VLSI Design. This list starts from the basic level … Read more
If you want to enhance your understanding and grow in any field, books can be your best buddy. Reading good books is a proven way to enhance understanding and develop depth knowledge of any domain. So I would like to say, the semiconductor industry is not an exception to this trend. If you want to … Read more
Code: QLCM2Y062020PV General Questions What are lambda based design rules? What is nm in 10nm technology node? Do you know about under bum density? Any prior experience of PnR? How do you import design in PnR? Why ID layers have been given in lower nodes (10nm)? Why nwell continuity is required? Have you done … Read more
Code: INTL2Y052020PV Floorplan What are the inputs for floorplan? In order to make sure integration is DRC clean, what rules or guidelines need to be followed at the floorplan stage? Can we abut macros on par boundary? How will judge the congestion between two IPs during floorplan stage without actual routing being done? Apart … Read more
Code: INTL2Y052020PV General What is done to solve congestion in lower and higher metal? How cell spreading helps in routing congestion? Cell spreading is done on what basis? What is DFM and why is it needed? What happens if DFM is not met? What are the inputs to GDSII file? What is crosstalk, Which checker … Read more
Code: MDTK3Y062019PDSYN Formal Introduction Whats are the projects you have done related to synthesis and Physical Design? Have you gone through Physical Design flow? What is synthesis? Whats are the inputs required for synthesis? What does constraint files contain? What is a multicycle path? What is a false path? Why do we perform STA? … Read more