Logic Synthesis and Physical Design Interview Questions : Question set – 1


Code: MDTK3Y062019PDSYN

  1. Formal Introduction
  2. Whats are the projects you have done related to synthesis and Physical Design?
  3. Have you gone through Physical Design flow?
  4. What is synthesis?
  5. Whats are the inputs required for synthesis?
  6. What does constraint files contain?
  7.  What is a multicycle path?
  8. What is a false path?
  9. Why do we perform STA?
  10. What is CTS?
  11. Why do we perform Setup analysis?
  12. How to fix setup violations?
  13. What are the ways to fix the setup violations?
  14. What is the clock skew?
  15. Why CTS is done before Routing?
  16. What is On-Chip Variation?
  17. What is Antenna Effect?
  18. What is library setup and hold time for a flip flop?
  19. Why there is a setup time requirements for a flip flop?
  20. Why Hold time required for a flip flop?
  21. What is the temperature Inversion?
  22. How does the threshold voltage vary with temperature?
  23. How does mobility vary with temperature?
  24. Do you have any questions for me?

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